Lab 9: Servicing the ADC with DMA
C2000 Microcontroller Workshop - Direct Memory Access Controller 9 - 15
F2806x_GlobalVariableDefs.c
F2806x_Headers_nonBIOS.cmd
Inspect Lab_9.cmd
2. Open and inspect Lab_9.cmd. Notice that a section called “dmaMemBufs” is being
linked to L5DPSARAM. This section links the destination buffer for the DMA transfer to
a DMA accessible memory space.
Setup DMA Initialization
The DMA controller needs to be configured to buffer ADC channel A0 ping-pong style with 50
samples per buffer. One conversion will be performed per trigger with the ADC operating in
single sample mode.
3. Edit Dma.c to implement the DMA operation as described in the objective for this lab
exercise. Configure the DMA Channel 1 Mode Register (MODE) so that the ADC
ADCINT1 is the peripheral interrupt source. Enable the peripheral interrupt trigger and
set the channel for interrupt generation at the start of transfer. Configure for 16-bit data
transfers with one burst per trigger and auto re-initialization at the end of the transfer. In
the DMA Channel 1 Control Register (CONTROL) clear the error and peripheral
interrupt bits. Enable the channel to run.
4. Open Main_9.c and add a line of code in main() to call the InitDma() function.
There are no passed parameters or return values. You just type
InitDma();
at the desired spot in main().
Setup PIE Interrupt for DMA
Recall that ePWM2 is triggering the ADC at a 50 kHz rate. In the previous lab exercise, the ADC
generated an interrupt to the CPU, and the CPU implemented the FIR filter in the ADC ISR. For
this lab exercise, the ADC is instead triggering the DMA, and the DMA will generate an interrupt
to the CPU. The CPU will implement the FIR filter in the DMA ISR.
5. Edit Adc.c to comment out the code used to enable the ADCINT1 interrupt in PIE group 1.
This is no longer being used. The DMA interrupt will be used instead.
6. Using the “PIE Interrupt Assignment Table” find the location for the DMA Channel 1
interrupt “DINTCH1” and fill in the following information:
PIE group #: # within group: