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ABB RET670 - Page 435

ABB RET670
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2ndHarmStab: The rate of 2nd harmonic current content for activation of the 2nd
harmonic restrain signal. The setting is given in % of the fundamental frequency
residual current.
HarmRestrainx: Enable block of step x from the harmonic restrain function.
Parallel transformer inrush current logic
In case of parallel transformers there is a risk of sympathetic inrush current. If one of
the transformers is in operation, and the parallel transformer is switched in, the
asymmetric inrush current of the switched in transformer will cause partial saturation
of the transformer already in service. This is called transferred saturation. The 2
nd
harmonic of the inrush currents of the two transformers will be in phase opposition.
The summation of the two currents will thus give a small 2
nd
harmonic current. The
residual fundamental current will however be significant. The inrush current of the
transformer in service before the parallel transformer energizing, will be a little
delayed compared to the first transformer. Therefore we will have high 2
nd
harmonic
current initially. After a short period this current will however be small and the normal
2
nd
harmonic blocking will reset.
en05000136_ansi.vsd
Power System
51N
51N
ANSI05000136 V1 EN
Figure 193: Application for parallel transformer inrush current logic
If the BlkParTransf function is activated the 2
nd
harmonic restrain signal will latch as
long as the residual current measured by the relay is larger than a selected step current
level. Assume that step 4 is chosen to be the most sensitive step of the four step
residual overcurrent protection function EF4PTOC (51N_67N). The harmonic restrain
blocking is enabled for this step. Also the same current setting as this step is chosen for
the blocking at parallel transformer energizing.
Below the settings for the parallel transformer logic are described.
Use_PUValue: Gives which current level that should be used for activation of the
blocking signal. This is given as one of the settings of the steps: Step 1/2/3/4. Normally
the step having the lowest operation current level should be set.
BlkParTransf: This parameter can be set Disable/Enable, the parallel transformer logic.
1MRK504116-UUS C Section 3
IED application
429
Application manual

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