Abov MC97F6108A User Manual

6. Interrupt controller MC97F6108A User’s manual
72
CFFLAG (Comparator Flag Register) : C8H
7
6
5
4
3
2
1
0
-
-
-
C4_FLAG
C3_FLAG
C2_FLAG
C1_FLAG
C0_FLAG
-
-
-
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
When an comparator source is generated and CFENAB is set to '1', the
flag is generated.
The flag can be cleared by writing a ‘0’ to bit.
It is not cleared automatically.
C4_FLAG
When Comparator4 occurs this bit is set.
0
Comparator4 not occurred
1
Comparator4 occurred
C3_FLAG
When Comparator3 occurs this bit is set.
It is cleared automatically when PPG period matching.
0
Comparator3 not occurred
1
Comparator3 occurred
C2_FLAG
When Comparator2 occurs this bit is set.
0
Comparator2 not occurred
1
Comparator2 occurred
C1_FLAG
When Comparator1 occurs this bit is set.
0
Comparator1 not occurred
1
Comparator1 occurred
C0_FLAG
When Comparator0 occurs this bit is set.
It is cleared automatically when PPG period matching.
0
Comparator0 not occurred
1
Comparator0 occurred
CFEDGE (Comparator Flag Edge Register) : C0H
7
6
5
4
3
2
1
0
-
-
-
CFEDGE4
CFEDGE3
CFEDGE2
CFEDGE1
CFEDGE0
-
-
-
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
CFEDGE4
Determines the type of Comparator4 flag, edge or level sensitive.
0
Level (default)
1
Edge
CFEDGE3
Determines the type of Comparator3 flag, edge or level sensitive.
0
Level (default)
1
Edge
CFEDGE2
Determines the type of Comparator2 flag, edge or level sensitive.
0
Level (default)
1
Edge
CFEDGE1
Determines the type of Comparator1 flag, edge or level sensitive.
0
Level (default)
1
Edge
CFEDGE0
Determines the type of Comparator0 flag, edge or level sensitive.
0
Level (default)
1
Edge

Abov MC97F6108A Specifications

General

Brand	Abov
Model	MC97F6108A
Category	Microcontrollers
Language	English