12-14 Service Guide
Theory of Operation 8719ET/20ET/22ET
Source Group Theory 8719ES/20ES/22ES
RF Network Analyzers
7. Phase lock is acquired and a synthesized subsweep is generated. The source tracks the
synthesizer.
Source Pretune
The pretune DAC (digital-to-analog converter) in the A11 phase lock assembly sets the
source YIG oscillator frequency to approximately 2.4 GHz. This signal (SOURCE OUT) is
input to the R sampler assembly.
A14/A13 Fractional-N Synthesizer
The A14/A13 fractional-N assemblies comprise the synthesizer. The source feedback circuit
phase locks the YIG oscillator to the synthesizer output signal as explained in “A11
Phase Lock: Comparing Phase and Frequency” on page 12-15.
The VCO in the A14 fractional-N (digital) assembly generates a swept or CW signal in the
range of 60 to 240 MHz, such that a harmonic is 10 MHz above the desired source
frequency. This is divided down and phase locked (in the A13 assembly) to a 100 kHz signal
FN REF from the A12 reference. A programmable divider is set to some number, N, such
that the integer part of the expression FVCO/N is equal to 100 kHz. To achieve frequencies
between integer multiples of the reference, the divider is programmed to divide by N part
of the time and by N+1 part of the time. The ratio of the divisions yields an average equal
to the desired fractional frequency. API (analog phase interpolator) current sources in the
A13 assembly correct for phase errors caused by the changing of the “divide by number.”
The resulting synthesized signal goes to the pulse generator.
A52 Pulse Generator: the Harmonic Comb
The signal from the synthesizer drives a step recovery diode (SRD) in the A52 pulse
generator assembly. The SRD generates a comb of harmonic multiples (1st LO) of the VCO
frequency, which goes to the samplers. One of the harmonics is 10 MHz above the desired
start frequency.
A64 R Sampler: Down-Converting the Signals
The A64 assembly is part of the receiver functional group. It is also included here because
it is an integral part of the source phase locking scheme. In the R sampler, the 1st LO
signal from the pulse generator is mixed with the SOURCE OUT signal from the source.
The difference is the intermediate frequency (IF), which is nominally 10 MHz. For phase
locking, part of this IF signal is routed back to the A11 phase lock assembly. (Additional
information on the sampler assemblies is provided in “Receiver Theory” on page 12-24.)
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