The DCHI enables automatically.
2.
Enter the following command in LD 60 to software enable the clock controller:
ENL CC 0
3. Enter the following command to enable clock tracking on primary digital loop:
TRCK PCK
Within about 30 seconds, the D-channel layer 3 should be established.
4. You can request the current status of the D-channel by issuing the command STAT
DCH. The system should respond DCH N EST in LD 96 (meaning that the D-channel
is established and operational).
Enabling the NTBK50 PRI
1. If using the NTBK51 DDCH daughterboard, enter the following command in LD 96
to enable the DDCH:
ENL MSDL X
2. Enter the following command in LD 60 to software enable all 2.0 Mb PRI cards:
ENLL N
The DCHI enables automatically.
3. Enter the following command in LD 60 to software enable the clock controller:
ENL CC 0
4. Enter the following command to enable clock tracking on primary digital loop:
TRCK PCK
Within about 30, seconds the D-channel layer 3 should be established.
5. You can request the current status of the D-channel by issuing the command STAT
DCH. The system should respond DCH N EST in LD 96 (meaning that the D-channel
is established and operational).
Disable the 2.0 Mb PRI before removal
T
o disable a PRI circuit pack, follow the appropriate procedure below.
Disabling the NTAK79 PRI
1. Enter the following command in LD 96 to software disable the DCHI:
DIS DCH N
Where N is the D-channel device number.
2. Enter the following command in LD 60 to software disable the clock controller:
2.0 Mb PRI maintenance
146 ISDN Primary Rate Interface Maintenance November 2011
Comments? infodev@avaya.com
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