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Avaya CS 1000 - Configuration using IP DECT Configurator

Avaya CS 1000
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Table 30: LD 60 Clock controller maintenance
Commands Description
DIS CC l s Disable system clock controller on specified superloop and shelf.
ENL CC l s Enable system clock controller on specified superloop and shelf.
SSCK l s Get status of system clock on specified superloop and shelf
TRCK aaa l s Set the clock controller tracking to primary, secondary or free run Where aaa
is: PCK = track primary clock SCLK = track secondary clock FRUN = free
run mode
LD 96 D-Channel and MSDL maintenance
T
able 31: LD 96 D-Channel and MSDL maintenance
Commands Description
DIS DCH x Disable DCH x.
ENL DCH x (FDL) Enable DCH x and attempt to establish the link, and force
download to MSDL.
EST DCH x Establish multiple frame operation on D-channel x.
RLS DCH x Release D-channel x.
RST DCH x Reset D-channel x, inhibit signaling.
STAT DCH (x) Get status of one or all D-channels
STAT MON (x) Display the incoming and outgoing monitoring status of
one or all D-channels.
DIS MSDL l s c (ALL) Disable MSDL card X
ENL MSDL l s c (FDL,ALL) Enable MSDL card X, with or without Force Download
RST MSDL l s c Reset MSDL card X
STAT MSDL (l s c (full)) Get MSDL status X, or a “FULL STATUS”
LD 75 IDA (DPNSS/DASS2) loop and D-channel maintenance
T
able 32: LD 75 IDA (DPNSS/DASS2) loop and D-channel maintenance
Commands Description
Universal Digital Trunk card maintenance
94 ISDN Primary Rate Interface Maintenance November 2011
Comments? infodev@avaya.com

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