5322A
Operators Manual
154
Operation Status Register
The following ‘sticky’ bits in the Operation register are set by their associated
conditions:
Bit 8 RCD: trip current has been reached in trip time counting is in progress.
Bit 9 HIPT: HIPOT Timer has been started and counting is in progress.
Setting of Transition Filter is fixed (1 -> 0 change).
Bit 8 in the Event Register is set after the RCD trip time function is finished.
Bit 9 in the Event Register is set after the HIPOT Timer function is finished.
Questionable Status Register
Not used in the Product.
Output Queue
The Output Queue stores response messages until they are read from control
unit. If there is at minimum one sign in the output queue, the MAV register
(message available) is set. The Output Queue is cleared upon power-on and
after reading all signs from output queue.
Error Queue
The Error Queue stores error messages. They are placed in a first in, first out
queue.
The queue is read destructively using the query command SYSTem:ERRor? to
obtain a code number and error message. The query SYSTem:ERRor? can be
used to read errors in the queue until it is empty, when the message 0, No Error
will be returned.
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