Hioki RM3542 - Page 119

9.5 Communication Methods
113
9
Event Status Registers 0 (ESR0) and 1 (ESR1), and Event Status Enable Registers 0
(ESER0) and 1 (ESER1)
Event Status Register 0 (ESR0)
Bit 7

Unused
Bit 6 OvrRng Out-of-Range Detection Fault
Bit 5 ERR Measurement Fault
Bit 4 Hi High Comparator Result
Bit 3 IN IN Comparator Result
Bit 2 Lo Low Comparator Result
Bit 1 INDEX A/D Conversion Finished
Bit 0 EOM End of Measurement
Event Status Register 1 (ESR1)
Bit 7

Unused
Bit 6

Unused
Bit 5

Unused
Bit 4

Unused
Bit 3 VOLT Voltage Level Monitor Fault
Bit 2 CURR Current Monitor Fault
Bit 1 CE Hi Contact Check
– Hi side Fault
Bit 0 CE Lo Contact Check – Lo side Fault
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

OR ERR Hi IN Lo INDEX EOM
&&&&&&&&
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

OR ERR Hi IN Lo INDEX EOM
Event Status Enable Register 0 (ESER0)
bit 2bit 1bit 0
ESB1 ESB0
Status Byte Register (STB)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

VOLT CURR CE Hi CE Lo
&&&&&&&&
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0

VOLT CURR CE Hi CE Lo
Event Status Register 1 (ESR1)
Event Status Enable Register 1 (ESER1)
Logical
sum
Logical
sum
Event Status Register 0 (ESR0)