364
CHAPTER 17 SERIAL INTERFACE CHANNEL 0 (
µ
PD78054Y Subseries)
(c) Interrupt timing specify register (SINT)
SINT is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets SINT to 00H.
Notes 1. Bit 6 (CLD) is a read-only bit.
2. When CSIE0 = 0, CLD becomes 0.
Caution Be sure to set bits 0 to 3 to 0 in the 2-wire serial I/O mode is used.
Remark CSIIF0 : Interrupt request flag corresponding to INTCSI0
CSIE0 : Bit 7 of serial operating mode register 0 (CSIM0)
<6> <5> <4> <3> <2> 1 07
Symbol
SINT 0 CLD SIC CLC WREL WAT1 WAT0
FF63H 00H R/W
Note 1
Address After Reset R/W
SVAM
SIC
0
INTCSI0 Interrupt Factor Selection
CSIIF0 is set upon termination of serial interface channel 0 transfer
CSIIF0 is set upon bus release detection or termination of serial interface channel 0 transfer
CLD
0
1
SCK0 Pin Level
Note 2
Low level
High level
R/W
R
1
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