NEC PD78052 - Program Execution Flow; Program Transition Diagram (When One Place Is Corrected)

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544

CHAPTER 25 ROM CORRECTION

Correction place

Internal ROM

JUMP

FFFFH

F7FFH

F7FDH

xxxxH

0000H

(1)

(2)

(3)

BR !JUMP

Correction program

25.6 Program Execution Flow

Figures 25-9 and 25-10 show the program transition diagrams when the ROM correction is used.

Figure 25-9. Program Transition Diagram (when one place is corrected)

(1) Branches to address F7FDH when fetch address matches correction address

(2) Branches to correction program

(3) Returns to internal ROM program

Remark Area filled with diagonal lines : Internal expansion RAM

JUMP : Correction program start address

Main Page

Default Chapter6
- Regional Information6
- Major Revisions in this Edition7
- Table of Contents17
CHAPTER 1 GENERAL ( PD78054 Subseries)37
- Features37
- Applications38
- Ordering Information38
- Quality Grade39
- Pin Configuration (Top View)40
- Series Expansion43
- Block Diagram45
- Outline of Function46
  - Mask Options of Mask ROM Versions48
- Differences between Standard Quality Grade Products and (A) Products48
- Mask Options48
CHAPTER 2 GENERAL ( PD78054Y Subseries)49
- Features49
- Applications50
- Ordering Information50
- Quality Grade50
- Pin Configuration (Top View)51
- Series Expansion54
- Block Diagram56
- Outline of Function57
- Mask Options58
CHAPTER 3 PIN FUNCTION ( PD78054 Subseries)59
- Pin Function List59
  - Normal Operating Mode Pins59
  - PROM Programming Mode Pins (PROM Versions Only)63
- Description of Pin Functions64
- Input/Output Circuits and Recommended Connection of Unused Pins71
  - Pin Input/Output Circuit Types71
  - Pin Input/Output Circuit of List73
CHAPTER 4 PIN FUNCTION ( PD78054Y Subseries)75
- Pin Function List75
  - Normal Operating Mode Pins75
  - PROM Programming Mode Pins (PROM Versions Only)79
- Description of Pin Functions80
- Input/Output Circuits and Recommended Connection of Unused Pins87
  - Pin Input/Output Circuit Types87
  - Pin Input/Output Circuit of List89
Chapter 5 Cpu Architecture91
- Memory Spaces91
- Processor Registers109
- Instruction Address Addressing118
- Operand Address Addressing121
Chapter 6 Port Functions129
- Port Functions129
- Port Types129
- Port Functions ( PD78054 Subseries)130
- Port Functions ( PD78054Y Subseries)132
- Port Configuration134
- Port Function Control Registers150
- Port Function Operations156
- Selection of Mask Option157
Chapter 7 Clock Generator159
- Clock Generator Functions159
- Clock Generator Configuration159
  - Block Diagram of Clock Generator160
- Clock Generator Control Register161
- System Clock Oscillator165
  - Main System Clock Oscillator165
  - Examples of Incorrect Oscillator Connection166
    - Scaler168
    - When no Subsystem Clocks Are Used168
- Clock Generator Operations169
- Changing System Clock and CPU Clock Settings171
  - Time Required for Switchover between System Clock and CPU Clock171
  - System Clock and CPU Clock Switching Procedure173
Chapter 8 16-Bit Timer/Event Counter175
- Outline of Timers Incorporated in the PD78054, 78054Y Subseries175
  - Timer/Event Counter Operations176
- 16-Bit Timer/Event Counter Functions177
  - Bit Timer/Event Counter Interval Times177
  - Bit Timer/Event Counter Square-Wave Output Ranges178
- 16-Bit Timer/Event Counter Configuration179
- 16-Bit Timer/Event Counter Control Registers182
- 16-Bit Timer/Event Counter Operations191
- 16-Bit Timer/Event Counter Operating Precautions212
Chapter 9 8-Bit Timer/Event Counters 1 and 2215
- 8-Bit Timer/Event Counters 1 and 2 Functions215
- 8-Bit Timer/Event Counters 1 and 2 Configurations220
  - Bit Timer/Event Counters 1 and 2 Block Diagram221
    - Block Diagram of 8-Bit Timer/Event Counter Output Control Circuit 1222
    - Block Diagram of 8-Bit Timer/Event Counter Output Control Circuit 2222
- 8-Bit Timer/Event Counters 1 and 2 Control Registers223
- 8-Bit Timer/Event Counters 1 and 2 Operations228
- Cautions on 8-Bit Timer/Event Counters 1 and 2238
  - Event Counter Operation Timing239
  - Timing after Compare Register Change During Timer Count Operation239
Chapter 10 Watch Timer241
- Watch Timer Functions241
  - Interval Timer Interval Time241
- Watch Timer Configuration242
- Watch Timer Control Registers242
- Watch Timer Operations246
  - Watch Timer Operation246
  - Interval Timer Operation246
Chapter 11 Watchdog Timer247
- Watchdog Timer Functions247
  - Watchdog Timer Runaway Detection Times247
  - Interval Times248
- Watchdog Timer Configuration249
  - Watchdog Timer Block Diagram249
- Watchdog Timer Control Registers250
  - Timer Clock Select Register 2 Format251
  - Watchdog Timer Mode Register Format252
- Watchdog Timer Operations253
  - Watchdog Timer Operation253
  - Watchdog Timer Runaway Detection Times253
    - Interval Timer Interval Time254
    - Interval Timer Operation254
Chapter 12 Clock Output Control Circuit255
- Clock Output Control Circuit Functions255
  - Remote Controlled Output Application Example255
- Clock Output Control Circuit Configuration256
  - Clock Output Control Circuit Block Diagram256
- Clock Output Function Control Registers257
  - Timer Clock Select Register 0 Format258
  - Port Mode Register 3 Format259
Chapter 13 Buzzer Output Control Circuit261
- Buzzer Output Control Circuit Functions261
- Buzzer Output Control Circuit Configuration261
- Buzzer Output Control Circuit Block Diagram261
  - Buzzer Output Function Control Registers262
- Timer Clock Select Register 2 Format263
- Port Mode Register 3 Format264
Chapter 14 A/D Converter265
- A/D Converter Functions265
- A/D Converter Configuration265
  - A/D Converter Block Diagram266
- A/D Converter Control Registers269
- A/D Converter Operations273
- A/D Converter Cautions278
Chapter 15 D/A Converter281
- D/A Converter Functions281
- D/A Converter Configuration282
  - D/A Converter Block Diagram282
- D/A Converter Control Registers284
  - D/A Converter Mode Register Format284
- Operations of D/A Converter285
- Cautions Related to D/A Converter286
  - Use Example of Buffer Amplifier286
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( PD78054 Subseries)287
- Differences between Channels 0, 1, and 2287
- Serial Interface Channel 0 Functions288
  - Serial Bus Interface (SBI) System Configuration Example289
- Serial Interface Channel 0 Configuration290
  - Serial Interface Channel 0 Block Diagram291
- Serial Interface Channel 0 Control Registers294
- Serial Interface Channel 0 Operations301
CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( PD78054Y Subseries)341
- Differences between Channels 0, 1, and 2341
- Serial Interface Channel 0 Functions342
- Serial Interface Channel 0 Configuration344
  - Serial Interface Channel 0 Block Diagram345
  - Serial Interface Channel 0 Interrupt Request Signal Generation347
- Serial Interface Channel 0 Control Registers348
- Serial Interface Channel 0 Operations356
Chapter 18 Serial Interface Channel 1393
- Serial Interface Channel 1 Functions393
- Serial Interface Channel 1 Configuration394
  - Serial Interface Channel 1 Block Diagram395
- Serial Interface Channel 1 Control Registers397
- Serial Interface Channel 1 Operations405
Chapter 19 Serial Interface Channel 2439
- Serial Interface Channel 2 Functions439
- Serial Interface Channel 2 Configuration440
  - Serial Interface Channel 2 Block Diagram441
  - Baud Rate Generator Block Diagram442
- Serial Interface Channel 2 Control Registers444
- Serial Interface Channel 2 Operation452
Chapter 20 Real-Time Output Port477
- Real-Time Output Port Functions477
- Real-Time Output Port Configuration478
- Real-Time Output Port Control Registers480
Chapter 21 Interrupt and Test Functions483
- Interrupt Function Types483
- Interrupt Sources and Configuration484
  - Interrupt Source List484
  - Basic Configuration of Interrupt Function486
- Interrupt Function Control Registers488
- Interrupt Servicing Operations497
- Test Functions507
Chapter 22 External Device Expansion Function511
- External Device Expansion Functions511
- External Device Expansion Function Control Register516
- External Device Expansion Function Timing518
- Example of Connection with Memory523
  - Connection Example of PD78054 and Memory523
Chapter 23 Standby Function525
- Standby Function and Configuration525
- Standby Function Operations527
Chapter 24 Reset Function533
- Reset Function533
- Timing of Reset Input in STOP Mode by RESET Input534
- Timing of Reset Due to Watchdog Timer Overflow534
- Timing of Reset Input by RESET Input534
- Hardware Status after Reset535
Chapter 25 Rom Correction537
- ROM Correction Functions537
- ROM Correction Configuration537
  - Block Diagram of ROM Correction537
  - Correction Address Registers 0 and 1 Format538
- ROM Correction Control Registers539
  - Correction Control Register Format539
- ROM Correction Application540
- ROM Correction Example543
- Program Execution Flow544
  - Program Transition Diagram (When One Place Is Corrected)544
  - Program Transition Diagram (When Two Places Are Corrected)545
- Cautions on ROM Correction546
Chapter 26 Pd78P054, 78P058547
- Pd78P054, 78P058547
- Differences between PD78P054, 78P058 and Mask ROM Versions547
- Differences between PD78P054 and 78P058548
  - Examples of Memory Size Switching Register Settings ( PD78P054)549
  - Memory Size Switching Register Format ( PD78P054)549
- Memory Size Switching Register ( PD78P054)549
  - Examples of Memory Size Switching Register Settings ( PD78P058)550
- Memory Size Switching Register ( PD78P058)550
  - Memory Size Switching Register Format ( PD78P058)550
- Internal Expansion RAM Size Switching Register551
  - Value Set to the Internal Expansion RAM Size Switching Register551
- PROM Programming552
- Erasure Procedure ( PD78P054KK-T and 78P058KK-T Only)559
- Opaque Film Masking the Window ( PD78P054KK-T and 78P058KK-T Only)559
- Screening of One-Time PROM Versions559
Chapter 27 Instruction Set561
- Legends Used in Operation List562
- Operation List564
- Instructions Listed by Addressing Type572
Appendix A Differences between Pd78054, 78054Y Subseries and Pd78058F, 78058Fy Subseries577
- A-1. Major Differences between PD78054, 78054Y Subseries and PD78058F, 78058FY Subseries578
APPENDIX A DIFFERENCES between Μpd78054, 78054Y SUBSERIES and579
Appendix B Development Tools579
- B-1. Development Tool Configuration580
- Language Processing Software582
  - B.2.1 Hardware584
  - B.2.2 Software584
- PROM Writing Tools584
  - Hardware584
  - Software584
    - B.3 Debugging Tools585
    - B.3.1 Hardware585
- Debugging Tools585
- OS for IBM PC589
- Upgrading Former In-Circuit Emulators for 78K/0 Series to IE-78001-R-A589
Appendix C Embedded Software593
Appendix D Register Index595
- Register Index595
Appendix E Revision History599

NEC PD78052 - Program Execution Flow; Program Transition Diagram (When One Place Is Corrected)

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