NEC PD78052 - Serial Interface Channel 1 Block Diagram

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CHAPTER 18 SERIAL INTERFACE CHANNEL 1
Figure 18-1. Serial Interface Channel 1 Block Diagram
RE ARLD ERCE ERR TRF STRB
BUSY
1
BUSY
0
Internal Bus
Automatic Data
Transmit/Receive
Control Register
Serial Operating
Mode Register 1
ADTI
7
ADTI
4
ADTI
3
ADTI
2
ADTI
1
ADTI
0
5-Bit Counter
Serial I/O
Shift Register 1
(SIO1)
Hand-
shake
Serial Clock
Counter
Selector
Selector
SO1/
P21
PM21
P21 Output
Latch
DIR DIR
Buffer RAM
Automatic Data
Transmit/Receive
Address Pointer
(ADTP)
SCK1/
P22
PM22
Internal Bus
TRF
P22 Output Latch
Match
ADTI0-ADTI4
Selector
TO2
INTCSI1
Clear
SIOI write
Q
R
S
Selector
TCL
37
TCL
36
TCL
35
TCL
34
4
Timer Clock
Select Register 3
f xx /2–f xx /2
8
Internal Bus
ARLD
CSIE1 DIR ATE
CSIM
11
CSIM
10
ATE
SI1/
P20
STB/
P23
PM23
BUSY/
P24
Automatic Data
Transmit/Receive Interval
Specify Register