NEC PD78052 - Page 381

381
CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( µ PD78054Y Subseries)
Figure 17-22. Data Transmission from Master to Slave
(Both Master and Slave Selected 9-Clock Wait) (3 of 3)
(c) Stop Condition
L
L
1
D5 D4 D3 D2 D1 D0 ACK D6 D7
2345678
A6 A5 A4 A3
12349
L
L
L
L
SIO0 ← Data
Master device operation
Transfer line
SIO0 ← Address
H
L
L
L
L
H
H
H
SIO0 ← FFH
Write SIO0
COI
ACKD
CMDD
RELD
CLD
P27
SCL
SDA0
WUP
BSYE
ACKE
CMDT
RELT
CLC
WREL
SIC
INTCSI0
Write SIO0
COI
ACKD
CMDD
RELD
CLD
P27
WUP
BSYE
ACKE
CMDT
RELT
CLC
WREL
SIC
INTCSI0
CSIE0
P25
PM25
PM27
Slave device operation
SIO0 ← FFH