To Next Page

To Previous Page

RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)

R01UH0368EJ0210 Rev.2.10 1217

Dec 10, 2015

Table 17-15. Types of Statuses in LIN Slave Mode

Status Status set condition Status clear condition

Operation mode

capable of

detecting a status

Corresponding

bit

Interrupt

Reset After the OM0 bit in the LCUCn

mode, if actually the LIN/UART

module is cleared from LIN reset

mode.

After the OM0 bit in the

LCUCn register is set to LIN

reset mode, if actually the

LIN/UART module enters LIN

reset mode.

All modes OMM0 bit in

LMSTn

Not

available

Operation

mode

After the OM1 bit in the LCUCn

mode, if actually the LIN/UART

module enters LIN operation

mode.

After the OM1 bit in the

LCUCn register is set to LIN

wake-up mode, if actually the

LIN/UART module enters LIN

wake-up mode.

 LIN operation

mode

 LIN wake-up

mode

OMM1 bit in

LMSTn

Not

available

Frame/wake-up

transmission

end

When a response field, a wake-up

signal, or a data group is

transmitted successfully.

 When cleared by software

 After transition to LIN reset

mode

 LIN operation

mode

 LIN wake-up

mode

FTC flag in

LSTn register

Available

Frame/wake-up

reception end

When a response field, a wake-up

signal, or a data group is received

successfully.

 When cleared by software

 After transition to LIN reset

mode

 LIN operation

mode

 LIN wake-up

mode

FRC flag in

LSTn register

Available

Error detection If any of the PRER flag, IPER flag,

CSER flag, SFER flag, FER flag,

TER flag ,and BER flags in the

LESTn register turns 1 (error

detected).

 When cleared by software

Note 1

 After transition to LIN reset

mode

 LIN operation

mode

 LIN wake-up

mode

ERR flag in

LSTn register

Available

Data 1

reception end

The RCDS bit in the LDFCn

first byte of the response field is

received

Note 2

 When cleared by software

 After transition to LIN reset

mode

LIN

operation mode D1RC flag in

LSTn register

Not

available

Header

reception end

When a header field is received

successfully.

 When cleared by software

 After transition to LIN reset

mode

LIN

operation mode HTRC flag in

LSTn register

Available

Notes 1. In LIN wake-up mode and LIN operation mode, the ERR flag in the LSTn register is cleared to 0 by writing 0

to the PRER flag, IPER flag, CSER flag, SFER flag, FER flag, TER flag or BER flags in the LESTn register.

2. Not detected when the RFDL[3:0] bits in the LDFCn register are 0000b (0-byte + checksum).

<R>

Brand	Renesas
Model	RL78/F13
Category	Computer Hardware
Language	English

Renesas RL78/F13 User Manual

Table of Contents

Questions and Answers:

Renesas RL78/F13 Specifications

Related product manuals