RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 821
Dec 10, 2015
15.3.14 Serial slave select enable register m (SSEm)
The SSEm register controls the SSImn pin input of the channel during CSI communication and in slave mode.
While a high-level signal is being input to the SSImn pin, no transmission/reception operation is performed even if a
serial clock is input. While a low-level signal is being input to the SSImn pin, a transmission/reception operation is
performed according to each mode setting if a serial clock is input.
Reset signal generation clears the SSEm register to 0000H.
Cautions 1. Writing is prohibited other than during CSI communication and in slave mode.
2. Can be set only when the SAU is stopped (SEmn = 0).
Figure 15-17. Format of Serial Slave Select Enable Register m (SSEm)
Address: F0122H, F0123H (SSE0) After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SSE0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SSE
01
SSE
00
Address: F0162H, F0163H (SSE1) After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SSE1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SSE
11
SSE
10
SSEmn
Note
Channel n SSImn input setting in CSI communication and slave mode
0 Disables SSImn pin input.
1 Enables SSImn pin input.
Note Set CKPmn bit of SCRmn register to 1, when SSEmn = 1.
Caution Be sure to clear bits 15 to 2 to 0.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1)
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