Renesas RL78/F13 - CAN Global Control Register H (GCTRH)

RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1303
Dec 10, 2015
18.3.12 CAN Global Control Register H (GCTRH)
Address GCTRHL: F0328H, GCTRHH: F0329H
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
— — — — — — — — — — — — — — — TS
RST
After Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Symbol Bit Name Description R/W
15 to 1 — Reserved These bits are always read as 0. The write value should
always be 0.
R
0 TSRST Timestamp Counter Reset Setting the TSRST bit to 1 resets the timestamp counter.
This bit is always read as 0.
R/W
• TSRST Bit
This bit is used to reset the timestamp counter. When this bit is set to 1, the GTSC register is cleared to H'0000.