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Renesas RL78/F13 - Cani Error Flag Register L (Cierfll) (I = 0)

Renesas RL78/F13
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RL78/F13, F14 CHAPTER 18 CAN INTERFACE (RS-CAN LITE)
R01UH0368EJ0210 Rev.2.10 1295
Dec 10, 2015
18.3.7 CANi Error Flag Register L (CiERFLL) (i = 0)
Address C0ERFLLL: F030CH, C0ERFLLH: F030DH
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
ADER
R
B0ERR B1ERR CERR AERR FERR SERR ALF BLF OVLF BORF BOEF EPF EWF BEF
After Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Symbol Bit Name Description R/W
15 Reserved This bit is always read as 0. The write value should
always be 0.
R
14 ADERR ACK Delimiter Error Flag 0: No ACK delimiter error is detected.
1: ACK delimiter error is detected.
R/(W)
Note
13 B0ERR Dominant Bit Error Flag 0: No dominant bit error is detected.
1: Dominant bit error is detected.
R/(W)
Note
12 B1ERR Recessive Bit Error Flag 0: No recessive bit error is detected.
1: Recessive bit error is detected.
R/(W)
Note
11 CERR CRC Error Flag 0: No CRC error is detected.
1: CRC error is detected.
R/(W)
Note
10 AERR ACK Error Flag 0: No ACK error is detected.
1: ACK error is detected.
R/(W)
Note
9 FERR Form Error Flag 0: No form error is detected.
1: Form error is detected.
R/(W)
Note
8 SERR Stuff Error Flag 0: No stuff error is detected.
1: Stuff error is detected.
R/(W)
Note
7 ALF Arbitration Lost Flag 0: No arbitration lost is detected.
1: Arbitration lost is detected.
R/(W)
Note
6 BLF Bus Lock Flag 0: No channel bus lock is detected.
1: Channel bus lock is detected.
R/(W)
Note
5 OVLF Overload Flag 0: No overload is detected.
1: Overload is detected.
R/(W)
Note
4 BORF Bus Off Recovery Flag 0: No bus off recovery is detected.
1: Bus off recovery is detected.
R/(W)
Note
3 BOEF Bus Off Entry Flag 0: No bus off entry is detected.
1: Bus off entry is detected.
R/(W)
Note
2 EPF Error Passive Flag 0: No error passive is detected.
1: Error passive is detected.
R/(W)
Note
1 EWF Error Warning Flag 0: No error warning is detected.
1: Error warning is detected.
R/(W)
Note
0 BEF Bus Error Flag 0: No channel bus error is detected.
1: Channel bus error is detected.
R/(W)
Note
Note The only effective value for writing to this flag bit is 0, which clears the bit. Otherwise writing to the bit results in
retention of its state. To write 0 to this flag bit, write by using an 8-bit data transfer instruction or a 16-bit data
transfer instruction.
<R>

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