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Renesas RL78/F13 - Registers

Renesas RL78/F13
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RL78/F13, F14 CHAPTER 19 DTC
R01UH0368EJ0210 Rev.2.10 1428
Dec 10, 2015
19.2 Registers
Tables 19-2 and 19-4 list the DTC register configuration.
Table 19-2. DTC Register Configuration (1)
Register Name Symbol After Reset Address Access Size
Peripheral Enable Register 1 PER1 00H F02C0H 1, 8
DTC Activation Enable Register 0 DTCEN0 00H F02E8H 1, 8
DTC Activation Enable Register 1 DTCEN1 00H F02E9H 1, 8
DTC Activation Enable Register 2 DTCEN2 00H F02EAH 1, 8
DTC Activation Enable Register 3 DTCEN3 00H F02EBH 1, 8
DTC Activation Enable Register 4 DTCEN4 00H F02ECH 1, 8
DTC Activation Enable Register 5
Note
DTCEN5 00H F02EDH 1, 8
DTC Base Address Register DTCBAR FDH F02E0H 8
Note Only in products of group E.
Table 19-3 lists DTC control data.
DTC control data is allocated in the DTC control data area in RAM.
The DTCBAR register is used to set the 256-byte area, including the DTC control data area and the DTC vector table
area where the start address for control data is stored.
Table 19-3. DTC Control Data
Register Name Symbol
DTC Control Register j DTCCRj
DTC Block Size Register j DTBLSj
DTC Transfer Count Register j DTCCTj
DTC Transfer Count Reload Register j DTRLDj
DTC Source Address Register j DTSARj
DTC Destination Address Register j DTDARj
Remark j = 0 to 23

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