Renesas RL78/F13 - Page 1684

RL78/F13, F14 CHAPTER 31 ON-CHIP DEBUG FUNCTION
R01UH0368EJ0210 Rev.2.10 1652
Dec 10, 2015
Figure 31-3. Memory Spaces Where Debug Monitor Programs Are Allocated
(512 bytes or
256 bytes
Note 2
)
: Area used for on-chip debugging
Note 1
Note 3
Code flash memory
Use prohibited
Internal RAM
Code flash
area
Mirror area
SFR area
Debug monitor area
(2 bytes)
Debug monitor area
(10 bytes)
Security ID area
(10 bytes)
On-chip debug option byte area
(1 byte)
Stack for debugging
(4 bytes)
Note 4
User’s stack
Stack area
01000 H
000D8 H
000CE H
000C4 H
000C3 H
00002 H
00000 H
Internal RAM
area
SP
FFFFH