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Figure A-9 Cycle time of the analog output module
Settling time
The settling time (t
2
to t
3
), that is, the time from the application of the converted value until the
specied value is reached at the analog output, depends on the load. A distinction must be made
between resistive, capacitive and inductive loads.
Response time
The response time (t
1
to t
3
), that is, the time from the digital output values being present in the
internal memory until the specied value is reached at the analog output, in the worst case, is
the sum of cycle time and settling time. The most unfavorable case is when the analog channel
was converted shortly before transmission of a new output value and is only converted again
after conversion of the other channels (cycle time).
The following gure shows the response time of the analog output channel.
Appendix
A.3 Reaction times
ET 200iSP
434 Operating Instructions, 11/2022, A5E00247483-AK