TIM 1531 IRC
Operating Instructions, 02/2018, C79000-G8976-C468-02
323
Mechanism for interlocking multiple simultaneous commands.
When entering commands, there is a check to determine if only one command is pending at
the time of acquisition. Transmission of the command byte is only triggered if there is a
single modified command bit in the command byte compared to the last cycle. If several bits
within the command byte have been changed, errors are detected and the command byte is
not sent.
The function is performed by the data point typical "Cmd01B_S" of the TD7onCPU block
library. The "FC Safe" block is also required.
Mechanism for interlocking multiple simultaneous commands.
When entering commands, there is a check to determine if only one command is pending at
the time of acquisition. Transmission of the command to the communication partner is only
triggered when a single command is pending. If several commands are pending at the same
time, errors are detected and the command is not sent or not issued by the receiver.
The function is executed by the "FC Safe" block of the TD7onCPU block library. The function
is supported by the data point typicals "Cmd01B_S", "Par12D_S" and "Set01W_S".
Access Point Name
DNS host name of the access point for an external network (in this case: access point in the
GPRS network to the Internet).
Conditional spontaneous frame
→
Spontaneous / conditional spontaneous / unconditional spontaneous frame
Communications processor
Module for expanded communications tasks that provides the CPU with additional interface
types or communications options.
Central Processing Unit
Main processor of a SIMATIC controller