RM0440 Rev 4 2099/2126
RM0440 Debug support (DBG)
2112
47.15.4 Configuration example
To output a simple value to the TPIU:
• Configure the TPIU and enable the I/IO_TRACEN to assign TRACE I/Os in the
STM32G4 Series debug configuration register
• Write 0xC5ACCE55 to the ETM Lock Access Register to unlock the write access to the
ITM registers
• Write 0x00001D1E to the control register (configure the trace)
• Write 0000406F to the Trigger Event register (define the trigger event)
• Write 0000006F to the Trace Enable Event register (define an event to start/stop)
• Write 00000001 to the Trace Start/stop register (enable the trace)
• Write 0000191E to the ETM Control Register (end of configuration)
47.16 MCU debug component (DBGMCU)
The MCU debug component helps the debugger provide support for:
• Low-power modes
• Clock control for timers, watchdog, I
2
C and bxCAN during a breakpoint
• Control of the trace pins assignment
47.16.1 Debug support for low-power modes
To enter low-power mode, the instruction WFI or WFE must be executed.
The MCU implements several low-power modes which can either deactivate the CPU clock
or reduce the power of the CPU.
The core does not allow FCLK or HCLK to be turned off during a debug session. As these
are required for the debugger connection, during a debug, they must remain active. The
MCU integrates special means to allow the user to debug software in low-power modes.
For this, the debugger host must first set some debug configuration registers to change the
low-power mode behavior:
• In Sleep mode, DBG_SLEEP bit of DBGMCU_CR register must be previously set by
the debugger. This feeds HCLK with the same clock that is provided to FCLK (system
clock previously configured by the software).
• In Stop mode, the bit DBG_STOP must be previously set by the debugger. This
enables the internal RC oscillator clock to feed FCLK and HCLK in Stop mode.
• In Standby mode, the bit DBG_STANDBY must be previously set by the debugger. This
keeps the regulators on, and enable the internal RC oscillator clock to feed FCLK and
HCLK in Standby mode. A system reset is generated internally so that exiting from
Standby is identical than fetching from reset.
The DBGMCU_CR register can be written by the debugger under system reset. If the
debugger host does not support these features, it is still possible to write this register by
software.
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