In this section:
Testing flash memory ............................................................... 8-1
Flash connection guidelines ..................................................... 8-2
Endurance testing .................................................................... 8-8
Disturb testing ........................................................................ 8-12
Using a switching matrix ........................................................ 8-14
Use KPulse to create and export Segment Arb waveforms ... 8-14
Enter Segment Arb values into UTM array parameters .......... 8-16
Direct connections to single DUT ........................................... 8-17
Direct connections to array DUT for disturb testing ................ 8-19
Testing flash memory
Clarius includes several projects that you can use to test floating gate transistors (NOR, NAND) and
other types of nonvolatile memory. This section describes the set up when using the
following projects:
• Floating Gate Memory Flash Disturb Project (flashdisturb-nand)
• Floating Gate Memory Flash Endurance Project (flashendurance-nand)
• Floating Gate Memory NAND Characterization Project (flash-nand)
For detailed information on using other memory projects, such as the Floating Gate Nonvolatile
Memory Characterization Project (floating-gate-nvm-examples), refer to the following application
note: Pulse I-V Characterization of Non-Volatile Memory Technologies (1KW-60638).
To use the flash memory tests, you need:
• Two pulse cards (four pulse channels).
• At least two SMUs. If your system does not include switching, it is best to have four SMUs to
match the number of pulse channels to connect to a three- or four-terminal device. You can use
4200-SMUs, 4201-SMUs, 4210-SMUs, or 4211-SMUs with the SMU preamplifiers removed.
• Interconnecting cables and adapters, shown in the following table.
• 8 in.-lb torque wrench for tightening the SMA connections.
Section 8
Testing flash memory
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