THEORY OF OPERATION Model 400E Ozone Analyzer
Instruction Manual
228 P/N 04316 Rev: B
10.3.2. CPU
The Model 400E’s CPU is a, low power (5 VDC, 0.8A max), high performance, 386-
based microcomputer running MS-DOS. Its operation and assembly conform to the
PC/104 Specification version 2.3 for embedded PC and PC/AT applications. It has 2
MB of DRAM on board and operates at 40MHz over an internal 32-bit data and
address bus. Chip to chip data handling is performed by two 4-channel DMA devices
over data busses of either 8-bit or 16-bit configuration. The CPU supports both RS-
232 and RS-485 Serial I/O.
The CPU includes two types of non-volatile data storage.
Disk On Chip
While technically an EEPROM, the Disk –on-Chip (DOC), this device appears to the
CPU as, behaves as, and performs the same function in the system as an 8MB disk
drive. It is used to store the operating system for the computer, the T-API
Firmware, and most of the operational data generated by the analyzer’s Internal
Data Acquisition System (iDAS - see Section 6.11).
Flash Chip
Another, smaller EEPROM used to store critical calibration and configuration data.
Segregating this data on a separate, less heavily accessed chip, significantly
decreases the chance of this key data being corrupted.
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