YOKOGAWA DL9040L User Manual

Triggering
3
2
1
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
App
Index
6-53
IM 701310-01E
Trigger when the second byte address matches the specified pattern
Mode General Call
Second Byte 7bit Master Address, address pattern: 1010 1011 (0xAB)
Data Mode: ON, Condition: True, Size: 2 bytes, Data pattern: 27 and AE
< Pos Mode: X >
S
27AB AE 57
27 FE
98 99 P00
4. Triggers here
Address and R/W bits
1. Determines whether the first byte is a general call address
2. Matches the specified address pattern (AB)
3. Matches the specified data pattern (27 and AE)
< Pos Mode: Select, Position: 3 >
S
27AB AE 57
27 AE
98 99 P00
5. Triggers here
Address and R/W bits
1. Determines whether the first byte is a general call address
4. Matches the specified data pattern (27 and AE)
3. Skips 3 bytes
2. Matches the specified address pattern (AB)
Start Byte/HS Mode
The DL9000 triggers on the start byte or the HS mode master code.
• Start Byte
The DL9000 triggers on a start byte (pattern: 0000 0001).
...
...
SDA
SCL
Start condition
1
2
3
4
5
6 7
8
9
Acknowledge bits
Data byte
Triggers here
1
2
3
4
5
6 7
8
9
Stop condition
Address and R/W bits
0 0 0 0 0 0 0 1
(Start byte)
• HS Mode
The DL9000 triggers on the HS (high-speed) mode master code (pattern: 0000 1XXX).
...
...
SDA
SCL
Start condition
1
2
3
4
5
6 7
8
9
Acknowledge bits
Data byte
Triggers here
1
2
3
4
5
6 7
8
9
Stop condition
Address and R/W bits
0 0 0 0 1 x x x
6.15 Triggering on an I
2
C Bus Signal

YOKOGAWA DL9040L Specifications

General

Brand	YOKOGAWA
Model	DL9040L
Category	Test Equipment
Language	English