408 Chapter8
ADC/Interface Section
A3 Assembly Control Circuits
11.Check that address lines A0 through A7 and data lines D0 through
D7 are all TTL high.
12.If any address or data line is low, press LINE to turn spectrum
analyzer off and disconnect the W2 control cable from A3J2. Press
LINE to turn spectrum analyzer on. Ignore any error messages.
13.Check that address lines A0 through A7 and data lines D0 through
D7 are all high. If all address and data lines are high, suspect a fault
either in W2 or one of the other four assemblies which connect to
W2.
14.If any address or data line is low, check the appropriate input of
either U405 (data lines) or U406 (address lines).
15.If a data line input is stuck low, check the data bus buffer. If an
address line input is stuck low, check A3W1 and the A2 controller
assembly.
16.If the appropriate input is high or toggling between high and low,
suspect a failure in either U405 (data lines) or U406 (address lines).
17.Remove jumpers.
Analog Bus Timing
Refer to function block P of A3 Interface Assembly Schematic Diagram
(sheet 4 of 6) in the Spectrum Analyzer Component Level Information
and 8560 E-Series Spectrum Analyzer Component Level Information.
Analog bus timing (ABT) generates the strobes for the A4, A5, A14, and
A15 assemblies. The A14 frequency control assembly also requires a
qualifier for its strobe, LVFC_ENABLE. A3U400 and A3U414 provide a
2 µs delay between the time HANA_BUS goes high and the enable line
to demultiplexer A3U407 goes low.
1. Press
PRESET on the spectrum analyzer and set the controls as
follows:
Center frequency .................................................. 300MHz
Span ...................................................................... 100MHz
2. Check that A3U407 pin 1 goes low approximately 2 µs after
HANA_BUS (A3U400 pin 3) goes high.
3. If HANA_BUS is absent, check for pulses on ABT A3U505 pin 2 and
IA10 (A3U505 pin 5).
4. If A3U407 pin 1 is not delayed 2 µs from HANA_BUS, check for the
presence of the 1 MHz HBADC_CLK0.
5. If A3U407 pin 1 is not delayed 2 µs from HANA_BUS and
HBADC_CLK0 is correct, suspect a fault in either A3U414 or
A3U400.
To Next Page
Loading...
Need help?
General
