Chapter 10 513
Controller Section
Reference Clock
Reference Clock
The reference clock circuitry takes the 8 MHz square wave clock and
triples the frequency to 24 MHz. This is accomplished through two
stages of filtering of the 8 MHz signal, to extract the third harmonic.
The 8 MHz signal is first passed through a high pass filter consisting of
C123 and L15. The the signal passes through a bandpass filter centered
at 24 MHz, consisting of C106, C08, L13, and R80. The comparator
U28B generates a square wave. The signal then passes through a
second stage of filtering by using the bandpass filter consisting of C89,
C88, L12, and R77. Comparator U28A then regenerates the square
wave. A divide-by-two flip flop in U16 divides the 24 MHz signal to
create the 12 MHz signal used by the ADC.
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