10-10 Service Guide
Service Key Menus and Error Messages 8719ET/20ET/22ET
Service Menus - Internal Diagnostics 8719ES/20ES/22ES
RF Network Analyzers
11 DSP Control − Tests the ability of the A7 CPU digital signal processor to
write to the control latches on the A10 digital IF. Feedback is verified by
the main processor. It primarily tests the A10 digital IF, but failures may
be caused by the A7 CPU.
12 Fr Pan Wr/Rd − Tests the ability of the A7 CPU main processor to
write/read to the front panel processor. It tests the A2 front panel interface
and processors A7 CPU data buffering and address decoding. (See also
tests 23 and 24 on page 10-11) This runs only when selected.
13 GPIB − Tests the ability of the A7 CPU main processor to write/read to the
rear panel control elements. It tests the GPIB chip on the A7 CPU board
and A7 CPU data buffering and address decoding. (It does not test the
GPIB interface; for GPIB interface checking, see the your user’s guide).
This runs only when selected or with ALL INTERNAL.
14 Post Reg − Polls the status register of the A8 post-regulator, and flags
these conditions: heat sink too hot, inadequate air flow, or post-regulated
supply shutdown.
15 Frac N Cont − Tests the ability of the A7 CPU main processor to
write/read to the control element on the A14 fractional-N (digital)
assembly. The control element must be functioning, and the fractional-N
VCO must be oscillating (although not necessarily phase-locked) to pass.
16 Sweep Trig − Tests the sweep trigger (L SWP) line from the A14
fractional-N to the A10 digital IF. The receiver with the sweep
synchronizes L SWP.
17 ADC Lin − Tests the linearity of the A10 digital IF ADC using the built-in
ramp generator. The test generates a histogram of the ADC linearity,
where each data point represents the relative “width” of a particular ADC
code. Ideally, all codes have the same width; different widths correspond to
non-linearizes.
18 ADC Ofs − This runs only when selected. It tests the ability of the offset
DAC, on the A10 digital IF, to apply a bias offset to the IF signals before
the ADC input. This runs only when selected.
19 ABUS Test − Tests analog bus accuracy, by measuring several analog bus
reference voltages (all nodes from the A10 digital IF). This runs only when
selected.
20 FN Count − Uses the internal counter to count the A14 fractional-N VCO
frequency (120 to 240 MHz) and the divided fractional-N frequency
(100 kHz). It requires the 100 kHz signal from A12 and the counter gate
signal from A10 to pass.
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