Avnet Qseven MSC Q7-BT User Manual

MSC Q7-BT MSC_Q7-BT_User_Manual.pdf 13 / 113
SPI:
 Depending on the signal BIOS_DISABLE either SIO SPI or PCU SPI provided by the SoC is switched to the Q7 connector.
 PCU SPI is used during BIOS boot up phase, when starting from external BIOS flash on the carrier board.
 SIO SPI should be used for customer applications.
I²C Bus:
 One of the SoC integrated I²C interfaces is connected to the Qseven
®
connector.
UART:
 Module provides a legacy UART connected to the Qseven
®
connector
SD Card:
 The Intel
®
Bay Trail SoC provides an SD card interface. The interface is directly routed to the carrier board via the Qseven
®
connector.
eMMC:
 Depending on BOM variant the module provides an eMMC chip. For more information see chapter 5.3.
EEPROM:
 An EEPROM is implemented for storing module specific information such as serial number, hardware version etc.
 BIOS configuration data is stored in the main BIOS flash.
TPM Support:
 For additional security functions a module variant assembled with a Trusted Platform Module can be ordered.
The TPM device on the LPC-Bus is the Infineon SLB9660 chip.

Avnet Qseven MSC Q7-BT Specifications

General

Brand	Avnet
Model	Qseven MSC Q7-BT
Category	Control Unit
Language	English