Set
and
Clear
The
interrupt registers, as well as the DMA control register, use a special way of select-
ing which of the bits are to be set or cleared. Bit
15
of these registers is called the
SETCLR bit.
When you wish to
set a bit (make it a
1),
you must place a 1 in the position you want to
set
and a 1 into position
15.
When you wish to clear a bit (make
it
a
0),
you must place a 1 in the position you wish
to
clear and a 0 into position
15.
Positions 14-0 are bit-selectors. You write a 1 to
anyone
or more bits to select
that
bit.
At
the same time you write a 1 or 0
to
bit
15
to
either set or clear the bits you have
selected. Positions 14-0
that
have 0 value will not be affected when you do the write. If
you want
to
set some bits and clear others, you will have to write this register twice
(once for setting some bits, once for clearing others).
Master
Interrupt
Enable
Bit
14
of the interrupt registers (INTEN) is for interrupt enable. This is the master
interrupt enable bit.
If
this bit is a
0,
it
disables
all
other interrupts. You may wish to
clear this bit to temporarily disable all interrupts to do some critical processing task.
NOTE
This bit
is
used for enable/disable only.
It
creates no interrupt request.
External
Interrupts
Bits
13
and 3 of the interrupt registers are reserved for external interrupts.
Bit
13,
EXTER, becomes a 1 when the system line called INT6* becomes a logic
o.
Bit
13
generates a level 6 interrupt.
Bit
3,
PORTS, becomes a 1 when the system line called INT2* becomes a
logi<:
O.
Bit 3 causes a level 2 interrupt.
System Control Hardware
209