Table
2-2:
Copper Instruction Summary
Move
Wait
Bit#
IRI
IR2
IRI
IR2
15
X
RD15 VP7 BFD
14
X
RD14 VP6 VE6
13
X RD13
VP5 VE5
12
X
RD12
VP4
VE4
11
X RD11 VP3
VE3
10
X
RDlO VP2 VE2
09
X RD09
VPl
VEl
08 DA8 RD08
VPO
YEO
07
DA7 RD07 HP8
HE8
06 DA6 RD06 HP7 HE7
05 DA5 RD05 HP6 HE6
04 DA4 RD04 HP5 HE5
03 DA3 RD03 HP4 HE4
02 DA2 RD02
HP3 HE3
01
DAI
RDOI
HP2 HE2
00
0
RDOO
1 0
X
=
don't
care,
but
should be a 0 for upward compatibility
IRI
= first instruction word
IR2
= second instruction word
DA
= destination address
RD
= RAM
data
to
be moved
to
destination register
VP
= vertical beam position bit
HP
= horizontal beam position
bit
VE = enable comparison (mask bit)
HE
= enable comparison (mask bit)
BFD
= blitter-finished disable
Skip
IRI
IR2
VP7 BFD
VP6 VE6
VP5 VE5
VP4 VE4
VP3 VE3
VP2 VE2
VPl
VEl
VPO
YEO
HP8 HE8
HP7 HE7
HP6
HEB
HP5 HE5
HP4 HE4
HP3 HE3
HP2 HE2
1
1
Coprocessor Hardware
25
To Next Page
Loading...
