CHAMP-AV8 (VPX6-462) HARDWARE USER’S MANUAL CURTISS-WRIGHT
1-8 PROPRIETARY 826448 VERSION 5 MARCH 2015
Notes
1. The EPxx references are from the VITA 65 specification which defines the mapping of
x4/x8/x16 ports to the P2 connector. The CHAMP-AV8 does not support x16 configurations.
2. The standard product configuration is XMC x8, EP00-EP07 x8, EP08-EP15 N/C (the second
highlighted row in the table). Contact the factory for other configurations, due to build-time
option requirements.
3. N/C = No connection
Enabled by the ability to configure non-transparent ports and partitions in the PCIe switch,
there are no limitations due to multiple root complexes within the PCIe network. The PCIe
Switch also features a four-channel DMA controller. The DMA offloads data movement
overhead from the processors and is typically used to move data between processors and
to/from the XMC and/or Expansion Plane devices. The DMA controllers operate from a
descriptor queue in memory and features source and destination address striding, to facilitate
data reorganization needs.
The PCIe switch is capable of internal partitions, which may be reconfigured from the BIOS.
For further details, please see Appendix A in the CHAMP-AV8 BIOS Software User's Manual,
Curtiss-Wright document 826450.
The default partition is illustrated in Figure 1.4, “PCIe Switch Partitions,” on page 1-9. With
this default partition, PCIe circuitry on the XMC site or EP[08:15] (depending on the build
option selected) is enumerated by CPU A and cannot be addressed directly from CPU B. PCIe
circuitry interfaced to EP[00:07] is enumerated by CPU B and cannot be addressed directly
from CPU A.
Some XMC cards may contain graphics or boot devices, such as SATA drives and PXE Ethernet
interfaces. These XMC modules typically require integrated option ROMs to enable proper PCIe
enumeration on Intel processor systems.
The standard XMC connector defined by VITA 42.0-2008, and used on the CHAMP-AV8, is
rated for signalling rates of at least 3.125GHz. The CHAMP-AV8 is designed to maximize
signal integrity; however, PCIe Gen 2 speeds (5GHz) are not guaranteed to properly
function to the XMC site.
Table 1.1: XMC/Expansion Plane Interface Build-Time Options for PCIe
XMC EP[00:03] EP[04:07] EP[08:11] EP[12:15]
x8 x4 x4 N/C N/C
x8 x8 N/C N/C
N/Cx4x4x4x4
N/C x8 x8
Please consult the factory before selecting a video or boot device XMC for use on the
CHAMP-AV8. XMCs without option ROMs may be usable on the CHAMP-AV8, perhaps with a
BIOS software modification.
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