CHAMP-AV8 (VPX6-462) HARDWARE USER’S MANUAL CURTISS-WRIGHT
A-4 PROPRIETARY 826448 VERSION 5 MARCH 2015
ABOUT VITA 46 AND ANSI/VITA 65
The CHAMP-AV8 meets the requirements set out in the VITA 46.0 (base specification), VITA
46.3 (SRIO on P1), and VITA 65 (PCIe on P2 and 1000Base-BX on P4). VPX delivers
significantly more I/O capability, almost twice what would be expected from a VME 64X class
card. All I/O pins are multi-gigabyte capable up to 6.25 Gbits/sec. And with the auxiliary VITA
48 standard there is the option for significantly more power dissipation per slot.
The CHAMP-AV8 employs Tyco VPX RT2 connectors, that incorporate a wafer style design that
provides tightly controlled impedance, low insertion loss, and less than 3% crosstalk at
signalling rates up to 6.25Gbaud. By default, the CHAMP-AV8 is configured for 5Gbaud SRIO
backplane interfaces.
The wafer converts a 7-row interface on the “P” (CHAMP-AV8 PWB) side of the connector, to
a 9-row interface on the “J” (backplane) side of the connector. Tables for both sides of the
connector are provided starting on page A-15 of this appendix.
Figure A.2 shows the module construction and differential tracking of the signal traces of the
Tyco 7-row MultiGig RT-2 connector.
Figure A.2: VPX RT2 Type Connector
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