CHAMP-AV8 (VPX6-462) HARDWARE USER’S MANUAL CURTISS-WRIGHT
1-26 PROPRIETARY 826448 VERSION 5 MARCH 2015
The incoming interrupts consist of two different types:
• Unlatched Interrupts - Status is visible in "Read-Only" interrupt status registers. These
interrupts are cleared at the source function.
• Latched Interrupts - Status is visible in and also cleared with "Read / Write-Clear" reg-
isters. These registers are required to store the occurrence of transient events, such as
timer roll-overs and watchdog exceptions.
The table below summarizes how the interrupt sources are assigned to groups.
Table 1.3: Interrupt Input Connections
Interrupt Input Latch Group
General Purpose timers (lower 2 of each node) [4]
Watchdog timers [4] MBSC [1]
General Purpose timers (local node) [4]
Latched SRC0
SRC1
I2O Interrupts (Doorbell, post q wr, overflow) [6]
1 PPS signal
Latched SRC2
Discrete I/O [10] Unlatched SRC3
SPI interface [1]
I2C interfaces [2]
SMBus ALERT signals [2]
PROCHOT [2]
Unlatched SRC4
SRC5
SHMUART [12]
SRIO Multi-cast Interrupt [1]
SRIO Switch Interrupt [1]
PCIe Switch Interrupt [1]
Unlatched SRC6
SRC7
UNUSED Unlatched SRC8
UNUSED Unlatched SRC9
UNUSED Unlatched SRC10
UNUSED Unlatched SRC11
UNUSED Unlatched SRC12
UNUSED Unlatched SRC13
UNUSED Unlatched SRC14
UNUSED Unlatched SRC15
UART_0 Unlatched SRC16[0]
UART_1 Unlatched SRC16[1]
UART_2 Unlatched SRC16[2]
UART_3 (UNUSED) Unlatched SRC16[3]
UNUSED Unlatched SRC16[4]
UNUSED Unlatched SRC16[5]
UNUSED Unlatched SRC16[6]
UNUSED Unlatched SRC16[7]
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