2.2.3. Reset Tree
The reset system will follow as below.
1. The CPU board and switch board will be power on. And the reset monitor IC will
check DC power voltage if reach the threshold.
2. The monitor IC will send Power_RST signal to CPLD if all power is OK.
3. CPLD pass the MANU_RST signal to CPU board, and hold the all reset signals
of switch board’s device
4. CPU get the switch board’s MANU_RST signal from switch board’s CPLD, it
means switch is ready to boot up. CPU board will check itself status and pull up
Reset_SYS_CPLD signal to switch’s CPLD to boot up switch board.
5. When switch’s CPLD get the Reset_SYS_CPLD signal, switch’s CPLD will pass
to all device on switch to boot up device.
6. When the system running, the switch’s CPLD has different register for every
device’s rest signal. CPU can reset switch’s device separately via switch’s
CPLD register.
If CPU wants to reset itself without main board system, CPU can set “1” in “reset_lock”
register of main board’s CPLD1 (0x0B).Main board CPLD1 will block “reset_sys_cpld” signal
to CPLD1, and main board CPLD1 will send “reset_lock” signal to CPU to indicate the
“reset_lock” register status. The default value of “reset_lock” register is “0”.
The following is about the reset tree topology.
Figure 7 Switch board Reset Tree
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