Edge-Core AS7326-56X Programming Guide

EDGECORE NETWORKS CORPORATION 2018
141
2
Port48_B
(P46_Lane1_LED_B)
R/W
1
1: Port48_B LED OFF (Default)
0: Port48_B LED ON
1
Port48_G
(P46_Lane1_LED_G)
R/W
1
1: Port48_G LED OFF (Default)
0: Port48_G LED ON
0
Port48_R
(P46_Lane1_LED_R)
R/W
1
1: Port48_R LED OFF (Default)
0: Port48_R LED ON
5.12.5. CPLD3 pin-out list
Table 34 CPLD3 Pin-out List
Pin
Net name
IN/ OUT
T9
P54_Lane2_LED_R
OUT
R9
P54_Lane3_LED_B
OUT
R5
P54_Lane0_LED_G
OUT
T10
P53_Lane3_LED_B
OUT
K16
N/A
R11
P55_Lane0_LED_G
OUT
T15
P56_Lane2_LED_B
OUT
T13
P55_Lane1_LED_G
OUT
M14
N/A
F15
N/A
E15
N/A
G16
N/A
R10
P56_Lane0_LED_G
OUT
C3
P39_Lane2_LED_G
OUT
T7
P53_Lane1_LED_B
OUT
L14
N/A
K15
N/A
T11
P56_Lane0_LED_B
OUT
K13
N/A
L13
N/A
N14
SFP_FX0_LED_G
OUT
F16
N/A
E16
N/A
G15
N/A
D11
P45_Lane0_LED_R
OUT
C11
N/A
C15
N/A

Edge-Core AS7326-56X Specifications

General

Brand	Edge-Core
Model	AS7326-56X
Category	Switch
Language	English