Edge-Core AS7326-56X - CPLD (for CPU Board)

EDGECORE NETWORKS CORPORATION 2018
46
this action
NMI_BTN_IN_BMC_N
When the NMI
event has been sent
to CPU, BMC need
to know this event
175
3.12. CPLD (For CPU Board)
The aim of the CPLD on the BDXDE CPU Board in the ES7654NT chassis is major for
power sequence, reset system, system interrupt, and BMC module function support.
The I2C address info of the CPLD is 0x65.
The CPLD has registers to record the board status, including error function , power
status , interrupt event , thermal event from CPU , and also the board ID and CPLD version.
Figure 24 CPLD block diagram
BDX_SATALED_N
C33_BDX_PWRGOOD_CPU
CPU_XDP_SYSPWROK
FM_CPLD_NGFF_OC1
FM_CPLD_NGFF_OC2
PCH_PLTRST_N
PCH_SLP_S3_N
PCH_SLP_S4_N
PS_PWR_GD
PWRGD_DDR4_VPP
PWRGD_P0V9_LAN
PWRGD_P1V05_PCH
PWRGD_P1V05_PCH
PWRGD_P1V8_LAN
PWRGD_P3V3PWRGD_P5V_STBY
PWRGD_PVCCKRHV
PWRGD_PVCCSCFUSESUS
XDP_PCH_RSMRST
VR_P1V2_VDDQ_PWRGD
ADR_MCU_INIT
C33_P1V05_PCH_EN
C33_P1V5_PCH_EN
C33_PVCCKRHV_EN
C33_PVCCSCFUSESUS_EN
CPLD_BDX_CPU_RSMRST
CPLD_BDX_PWRGOOD_CPU
CPLD_CPU_PCH_PLTRST_N
CPLD_LAN_IXFI_RST_N_LVL
CPLD_LED1_DEBUG
CPLD_LED3_DEBUG
CPLD_PCH_APWROK
CPLD_PCH_PWROK
CPLD_PCH_THERMTRIP_N
CPLD_PCHHOT_N
CPU_XDP_HOOK0
CPLD_SC_PWRGOOD
CPLD_UART0_OE
CPLD_UART1_OE
FM_CPLD_SFPP0_IXFI_OSC
FM_CPLD_NGFF_P1_EN1
FM_CPLD_NGFF_P2_EN1
FM_CPLD_P0V6_VTT_DIMM_EN
FM_CPLD_P0V9_LAN_EN
FM_CPLD_P1V8_LAN_EN
FM_CPLD_V3P3_PCH_EN
FM_CPLD_USB3_EN
FM_DDR4_VPP_CPLD_EN
FP_LED_HDD_ACTIVITY
FP_LED9_N
FP_LED10_N
FP_PWR_LED
LPC_DEBUG_RST
NIC1_DEV_OFF_N
NIC1_LAN_PWR_GOOD
NIC2_DEV_OFF_N
NIC2_LAN_PWR_GOOD
NV_SAVE_CH0_D1_R
NV_SAVE_CH1_D1_R
PCH_CPU2PCH_THROT_R
PCH_RSMRST_N
PCIE_RST_N
PCIE_RST_OE_N
FORCE_MEMPROCHOT
SMB_PWR_ALERT_R_N
TPM_RESET_R_N
USB_EN_OC_1
VR_PWREN_PVDDR
SFPP1_IXFI_REFCLK_OE
SPI_CS_SELECT
SOC_FPGA_DIN
VR_P3V3_CPLD_EN
VR_P5V_STBY_EN
XDP_PCH_PWRGD
XDP_PCH_CPU_PWRGD
PCH_PWRBTN_N
Delay
10ms
Delay
100ms
Delay
10ms
panic_time[7]
panic_time[2]
Delay
10ms
Delay
1ms
panic_time[6]
Delay
20ms
panic_time[5]
Delay
10us
Delay
5ms
panic_time[4]
panic_time[3]
panic_time[2]
CPLD_SC_PWRGOOD
PCH_SLP_S3_N
VR_PVCCIN_EN
Delay
5ms
PWRGD_PVCCIN
Delay
5ms
PCH_SLP_S3_N
Delay
1ms
PCH_SYS_PWROK
CPLD_CPU_CATERR_N
SYS_PWRBTN_N
CPLD_CPU_THERMTRIP_N
“1”
CPLD_CLK_25M
“1”
“0”
“0”
“1”
“1”
“1”
“0”
“1”
“1”
“1”
BDX_SATA1_ACTIVITY_LED1
BDX_SATA2_ACTIVITY_LED2
BDX_SATA3_ACTIVITY_LED3
BDX_SATA4_ACTIVITY_LED4
LED_DIG1_OUT1
LED_DIG1_OUT2
LED_DIG1_OUT3
LED_DIG1_OUT4
LED_DIG1_OUT5
LED_DIG1_OUT6
LED_DIG1_OUT7
LED_DIG2_OUT1
LED_DIG2_OUT2
LED_DIG2_OUT3
LED_DIG2_OUT4
LED_DIG2_OUT5
LED_DIG2_OUT6
LED_DIG2_OUT7
PCH_SYSRESET_N
PSHBTN_SYS_RESET_N
C33_CLK_33M_P80_CPLD1
LPC_P80_BUF_R_LFRAME_N
LPC_P80_BUF_R_LAD_0
LPC_P80_BUF_R_LAD_1
LPC_P80_BUF_R_LAD_2
LPC_P80_BUF_R_LAD_3
Port 80
display
BDX_SCLOCK
BDX_SLOAD
BDX_SDATAOUT0
PCH_SUSCLK_33K_CPLD1
SATA
“1”
Manu_RST
RST_BTN_OUT_BMC_N
PWR_BTN_OUT_BMC_N
P1014_RST
PCA9548_RST_N
BDX_CPU_PROCHOT_N B2B_PROCHOT_N
BMC_BTN_LOCKED_N
BMC_BTN_LOCKED_N