Edge-Core AS7326-56X - Ram

EDGECORE NETWORKS CORPORATION 2018
37
U44
MUX
U31
BDXDE
U9
U1
SPI
Clk/di/do
LAN_FLASH_CK
LAN_FLASH_DO
LAN_FLASH_DI
LAN_FLASH_CS_N
U18
Level
shift
U16
32Mb
SCK
SI
CS#
SO
SPI_CS1#
U2
mux
BIOS_SPI_KGI_N
U32
mux
128Mb
BIOS_SPI_CI_N
128Mb
CPLD
U12
SPI_CS_SELECT
BCM5720
U6
U39
M45PE20
2Mb
NVM_SI
NVM_SO
NVM_SK
NVM_CS_N
SCK
CS#
SI
SO
U43
MUX
CONN14
BMC
SPI_CLK_MOSI_MISO
BIOS_SPI_CLK_DI_DO
BDX_SPI_MUX_SEL
BIOS_SPI1_CS
CS0
CS1
CONN3
Dediprog
CS
CONN2
Jumper
CI_KGI_SELECT
Clk/di/do
BMC_CLK_DI_DO
BIOS_SPI_CLK_DI_DO
SEL
U42
MUX
BMC_SPI_CS_N
BMC_SPI_OUT_SEL
BMC_SPI_CS0
B1
B1
1B2
1B1
BIOS_SPI_CS1
B0
BDX_SPI_MUX_SEL
B2
OE#
Q16
SPI_MUX_OE_N
SF100_IO3
Q1
OE#
BIOS_SPI2_CS
BIOS_SPI2_CS_switch
119
SEL
SEL
B1
B0
133
141
A
1A
2A/3A/4A
OE# S
L L
L H
H X
U43 Function
A=B1
A=B2(Default)
Disconnect
S
L
H
MUX Function
B0=A
B1=A(Default)
A
3.6. RAM
The BDXDE can support memory DDR3 and DDR4 that need via strap pin DDR3_4_STRAP to
configure which one be supported. The project support two DDR4 SODIMM with ECC that has to pull
DDR3_4_STRAP to high.
Figure 17 RAM Connection