Edge-Core AS7326-56X - CPLD 3 Register

EDGECORE NETWORKS CORPORATION 2018
146
A5
P50_Lane0_LED_B
OUT
R7
P54_Lane1_LED_G
OUT
D7
P42_Lane1_LED_B
OUT
B4
P33_Lane0_LED_R
OUT
A6
P49_Lane0_LED_B
OUT
F2
P49_Lane3_LED_R
OUT
F6
IP_LED_DATA1
IN
J3
P52_Lane1_LED_R
OUT
C4
P38_Lane1_LED_B
OUT
D1
P39_Lane2_LED_R
OUT
F3
P50_Lane2_LED_G
OUT
A2
P33_Lane0_LED_G
OUT
C7
P42_Lane1_LED_R
OUT
C8
P44_Lane3_LED_G
OUT
B6
P49_Lane0_LED_G
OUT
B5
P50_Lane0_LED_G
OUT
D6
P41_Lane0_LED_B
OUT
P6
P53_Lane2_LED_R
OUT
A13
N/A
D2
P41_Lane0_LED_G
OUT
E1
P51_Lane1_LED_G
OUT
M9
I2C_0_SDA_CPLD3
IN/OUT
M8
I2C_0_SCL_CPLD3
IN
H12
N/A
H5
CPLD_OSC_OUT_25MHz_R
IN
J5
P52_Lane1_LED_B
OUT
5.12.6. CPLD 3 Register
Table 35 CPLD3 Register Table
Address
Register
R/W
Default value
0x01
CPLD version
Read Only
0x01
0x02
CPLD3 interrupt
Read &Write
0x01
0x10
SFP28 RGB LED -1
Read &Write
0x07
0x11
SFP28 RGB LED -2
Read &Write
0x07
0x12
SFP28 RGB LED -3
Read &Write
0x07
0x13
SFP28 RGB LED -4
Read &Write
0x07
0x14
SFP28 RGB LED -5
Read &Write
0x07