Edge-Core AS7326-56X - CPLD Register (for CPU Board); Offset 0 X00 Board Info (Read Only); Offset 0 X01 CPLD Version (Read Only); Offset 0 X02 BIOS Boot Flash Select (Read Only)

EDGECORE NETWORKS CORPORATION 2018
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3.14. CPLD Register (For CPU Board)
Table 13 CPLD I/O Register Summary
Address
Register
R/W
Default value
0x00
Board Info
Read Only
0x02
0x01
CPLD version
Read Only
0x07
0x02
BIOS boot flash select
R/W
0x03
Reset - System
R/W
0x04
Reset - device
R/W
0x05
Interrupt Event
Read Only
0x06
Error Status
Read Only
0x07
Thermal Status
Read Only
3.14.1. Offset 0x00 Board Info (Read Only)
Bit
Name
R/W
Reset
Value
Description
7:1
Reserved
NA
NA
0
PCB_version
R
0x2
\0x2 for R02
3.14.2. Offset 0x01 CPLD version (Read Only)
Bit
Name
R/W
Reset Value
Description
7:0
CPLD_ver[7:0]
R
0x07
CPLD version
3.14.3. Offset 0x02 BIOS boot flash select (Read Only)
Bit
Name
R/W
Reset Value
Description
7:3
Reserved
NA
NA
2
SPI_CS_SELECT
R/W
1
Function: Bios boot flash select
1: Boot from CI flash
0: Boot from KGI flash
1:0
Reserved
NA
NA
3.14.4. Offset 0x03 System Reset-1 (Read& Write)
Bit
Name
R/W
Reset Value
Description
[7:4]
Reserved
R/W
0
Reserve
3
System sleep
R/W
1
1: system is work at S0 state.