3.11.4. SMBUS ................................................................................................................................... 43
3.11.5. UART ...................................................................................................................................... 43
3.11.6. USB ........................................................................................................................................ 44
3.11.7. GPIO ...................................................................................................................................... 44
3.12. CPLD (For CPU Board) ........................................................................................................... 46
3.13. CPLD Architecture (For CPU Board) ...................................................................................... 47
3.13.1. Power Sequence ................................................................................................................... 47
3.13.2. Reset ..................................................................................................................................... 47
3.13.3. UART ...................................................................................................................................... 47
3.13.4. BMC ....................................................................................................................................... 47
3.13.5. Interrupt ................................................................................................................................ 48
3.13.6. SDATA .................................................................................................................................... 48
3.13.7. Thermal ................................................................................................................................. 49
3.14. CPLD Register (For CPU Board) ............................................................................................. 50
3.14.1. Offset 0x00 Board Info (Read Only) ...................................................................................... 50
3.14.2. Offset 0x01 CPLD version (Read Only) .................................................................................. 50
3.14.3. Offset 0x02 BIOS boot flash select (Read Only) .................................................................... 50
3.14.4. Offset 0x03 System Reset-1 (Read& Write) .......................................................................... 50
3.14.5. Offset 0x04 Reset - Device (Read& Write) ............................................................................ 51
3.14.6. Offset 0x05 System Interrupt (Read& Write) ....................................................................... 51
3.14.7. Offset 0x06 System Error (Read& Write) .............................................................................. 51
3.14.8. Offset 0x07 Thermal Status (Read& Write) .......................................................................... 52
3.15. LED ........................................................................................................................................ 52
3.16. GPIO ...................................................................................................................................... 54
4. Sub-system of MAC (BCM56873) .......................................................................................................... 58
4.1. Configurations of MAC (BCM56873) ..................................................................................... 59
4.2. POR of MAC (BCM56873) ...................................................................................................... 60
4.3. Port Mapping ........................................................................................................................ 61
4.4. 10G/25G/40G/100G Interface .............................................................................................. 65
4.5. LED interface ......................................................................................................................... 65
4.6. QSFP28 .................................................................................................................................. 67