Intel S1200BT - Page 99

Intel® Server Board S1200BT Service Guide 83
0x11 X X X O X X X O CPU PEI Module Starts
0x15 X X X O X O X O North Bridge PEI Module Starts
0x19 X X X O O X X O South Bridge PEI Module Starts
0x31 X X O O X X X O Memory Installed
0x32 X X O O X X O X CPU PEI Module for CPU initialization
0x33 X X O O X X O O CPU PEI Module for Cache initialization
0x34 X X O O X O X X CPU PEI Module for Boot Strap Processor
Select
0x35 X X O O X O X O CPU PEI Module for Application Processor
initialization
0x36 X X O O X O O X CPU PEI Module for CPU SMM initialization
0x4F X O X X O O O O Dxe IPL started
DXE Phase
0x60 X O O X X X X X DXE Core started
0x61 X O O X X X X O DXE NVRAM initialization
0x62 X O O X X X O X SB RUN initialization
0x63 X O O X X X O O Dxe CPU initialization
0x68 X O O X O X X X DXE PCI Host Bridge initialization
0x69 X O O X O X X O DXE NB initialization
0x6A X O O X O X O X DXE NB SMM initialization
0x70 X O O O X X X X DXE SB initialization
0x71 X O O O X X X O DXE SB SMM initialization
0x72 X O O O X X O X DXE SB devices initialization
0x78 X O O O O X X X DXE ACPI initialization
0x79 X O O O O X X O DXE CSM initialization
0x90 O X X O X X X X DXE BDS Started
0x91 O X X O X X X O DXE BDS connect drivers
0x92 O X X O X X O X DXE PCI Bus begin
0x93 O X X O X X O O DXE PCI Bus HPC initialization
0x94 O X X O X O X X DXE PCI Bus enumeration
Progress Code
Diagnostic LED Decoder
O = On, X=Off
Upper Nibble Lower Nibble
MSB 8h 4h 2h 1h 8h 4h 2h 1h LSB
#7 #6 #5 #4 #3 #2 #1 #0
Description