EasyManua.ls Logo

MEDIATEK Ralink MT7620 - 1000_2000)

Default Icon
523 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
PGMT7620_V.1.0_040503
Page 119 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.11.4 Register Descriptions (base: 0x1000_2000)
140. GLB_CFG: (offset: 0x0000)
Bits
Type
Name
Description
Initial Value
31
RW
PCM_EN
PCM Enable
When disabled, all FSM of PCM are cleared to
their default value.
0: Disable
1: Enable
0x0
30
RW
DMA_EN
DMA Enable
0: Disable the DMA interface, transfer data
using software.
1: Enable the DMA interface, transfer data
using DMA.
0x0
29
RW
LBK_EN
Loopback Enable
0: Normal mode
1: Loopback
(Asyn-TXFIFO DTX DRX Asyn-RXFIFO)
0x0
28
RW
EXT_LBK_EN
External Loopback Enable
0: Normal mode
1: External loopback enable
(Ext-Codec DRX DTX Ext-Codec)
0x0
27:23
-
-
Reserved
0x0
22:20
RW
RFF_THRES
RXFIFO Threshold
When the threshold is reached, the host/DMA
is notified to fill FIFO. The threshold should be
>2 and <6.
When data in FIFO is under the threshold, the
following interrupts and GDMA are triggered.
CH0T_THRES
CH0R_THRES
CH1T_THRES
CH1R_THRES
(unit: word)
0x4
19
-
-
Reserved
0x0
18:16
RW
TFF_THRES
TXFIFO Threshold
When the threshold is reached, the host/DMA
is notified to fill FIFO.
It should be >2 and <6.
When data in FIFO is over the threshold, an
interrupt and DMA are triggered.
(unit: word)
0x4
15:4
-
-
Reserved
-
3:0
RW
CH_EN
Channels 3 to 0 Tx and Rx Enable
0: Disable
1: Enable
0x0

Table of Contents

Related product manuals