MEDIATEK Ralink MT7620 - I2 C Controller

PGMT7620_V.1.0_040503
Page 97 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.9 I
2
C Controller
2.9.1 Features
 Programmable I
2
C bus clock rate
 Supports the Synchronous Inter-Integrated Circuits (I
2
C) serial protocol
 Bi-directional data transfer
 Programmable address width up to 8 bits
 Sequential byte read or write capability
 Device address and data address can be transmitted for device, page and address selection
 Supports Standard mode and Fast mode
2.9.2 Block Diagram
I2C
Configuration
Registers
PalmBus
Interface
Clock Control
State Machine
Serdes
Arbiter
Data Holding
Registers
SCLK
L_SCLK
SCLK_OE_N
L_SD
SDOUT
SD_OE_N
RST_N
CLK
PB_I2C_SEL
PB_WE
PB_RE
PB_ADDR
PB_WDATA
PB_I2C_RDATA
PB_I2C_WAIT
Figure 2-7 I2C Controller Block Diagram