MEDIATEK Ralink MT7620 - Page 96

PGMT7620_V.1.0_040503
Page 96 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
108. GPIO72_SET: Set PIO Pin Data Bit (offset: 0x00A4)
Bits
Type
Name
Description
Initial Value
31:1
-
-
Reserved
-
0
W
PIOSET
PIO Pin Set
Sets the corresponding bit in the PIODATA
output register.
0: No effect.
1: Set the selected PIODATA bit.
0x0
109. GPIO72_RESET: Clear PIO Pin Data Bit (offset: 0x00A8)
Bits
Type
Name
Description
Initial Value
31:1
-
-
Reserved
-
0
W
PIORESET
PIO Pin Reset
Clears the corresponding bit in the PIODATA
output register.
0: No effect.
1: Clear the selected PIODATA bit.
0x0
110. GPIO72_TOG: Toggle PIO Pin Data Bit (offset: 0x00AC)
Bits
Type
Name
Description
Initial Value
31:1
-
-
Reserved
-
0
W
PIOTOG
PIO Pin Toggle
Toggles the corresponding bit in the PIODATA
output register.
0: No effect.
1: Invert the selected PIODATA bit.
0x0