MEDIATEK Ralink MT7620 - Page 95

PGMT7620_V.1.0_040503
Page 95 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
105. GPIO72_DATA: PIO Pin Data (offset: 0x0098)
Bits
Type
Name
Description
Initial Value
31:1
-
-
Reserved
-
0
RW
PIODATA
PIO Pin Data
These bits are used for driving or sensing static
signals on the PIO pins. To drive a value onto a
PIO pin, the corresponding bit in the PIODIR
register must be set. If the corresponding
direction bit is set, the value written to the bit
in the PIODATA register will be driven at the
pin. A read of this register returns the value of
the signals currently on the PIO pins.
NOTE:
1. The value of any bit in this register is inverted
with respect to the pin if the corresponding bit
in the PIOPOL register is set, both in input and
output modes.
2. The values read from the PIO pins are not
synchronized; the user should be sure that the
data will not be changing when this register is
read, or should be aware that the bits which are
not static at that time may be inaccurate.
PC
106. GPIO72_DIR: PIO Pin Direction (offset: 0x009C)
Bits
Type
Name
Description
Initial Value
31:1
-
-
Reserved
-
0
RW
PIODIR
PIO Pin Direction
Sets the data direction on PIO pins
corresponding to bits in this register.
0: Set the data direction on this pin to input.
1: Set the data direction on this pin to output.
The values driven onto the PIO pins are
controlled by the PIOPOL and PIODATA
registers.
0x0
107. GPIO72_POL: PIO Pin Polarity (offset: 0x00A0)
Bits
Type
Name
Description
Initial Value
31:1
-
-
Reserved
-
0
RW
PIOPOL
PIO Pin Polarity
Sets the polarity of data on PIO pins
corresponding to bits in this register.
0: Maintain original polarity
1: Invert existing polarity
NOTE: The polarity controls affect both input
and output modes.
0x0