MEDIATEK Ralink MT7620 - List of Registers

PGMT7620_V.1.0_040503
Page 82 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.8.3 List of Registers
No.
Offset
Register Name
Description
Page
71
0x0000
GPIO23_00_INT
PIO Pin Ports 23 to 00 Interrupt Status
84
72
0x0004
GPIO23_00_EDGE
PIO Pin Ports 23 to 00 Edge Status
84
73
0x0008
GPIO23_00_RMASK
PIO Pin Ports 23 to 00 Rising Edge Interrupt Mask
85
74
0x000C
GPIO23_00_MASK
PIO Pin Ports 23 to 00 Falling Edge Interrupt Mask
85
75
0x0020
GPIO23_00_DATA
PIO Pin Ports 23 to 00 Data
85
76
0x0024
GPIO23_00_DIR
PIO Pin Ports 23 to 00 Data Direction
86
77
0x0028
GPIO23_00_POL
PIO Pin Ports 23 to 00 Data Polarity
86
78
0x002C
GPIO23_00_SET
PIO Pin Ports 23 to 00 Set Data Bit
86
79
0x0030
GPIO23_00_RESET
PIO Pin Ports 23 to 00 Clear Data Bit
86
80
0x0034
GPIO23_00_TOG
PIO Pin Ports 23 to 00 Toggle PIO Data Bit
86
81
0x0038
GPIO39_24_INT
PIO Pin Ports 39 to 24 Pin Interrupt Status
87
82
0x003C
GPIO39_24_EDGE
PIO Pin Ports 39 to 24 Pin Edge Status
87
83
0x0040
GPIO39_24_RMASK
PIO Pin Ports 39 to 24 Rising Edge Interrupt Mask
88
84
0x0044
GPIO39_ 24_FMASK
PIO Pin Ports 39 to 24 Falling Edge Interrupt Mask
88
85
0x0048
GPIO39_24_DATA
PIO Pin Ports 39 to 24 Data
89
86
0x004C
GPIO39_24_DIR
PIO Pin Ports 39 to 24 Data Direction
89
87
0x0050
GPIO39_24_POL
PIO Pin Ports 39 to 24 Data Polarity
89
88
0x0054
GPIO39_24_SET
PIO Pin Ports 39 to 24 Set Data Bit
90
89
0x0058
GPIO39_24_RESET
PIO Pin Ports 39 to 24 Clear Data Bit
90
90
0x005C
GPIO39_24_TOG
PIO Pin Ports 39 to 24 Toggle Data Bit
90
91
0x0060
GPIO71_40_INT
PIO Pin Ports 71 to 40 Interrupt Status
90
92
0x0064
GPIO71_40_EDGE
PIO Pin Ports 71 to 40 Edge Status
91
93
0x0068
GPIO71_40_RMASK
PIO Pin Ports 71 to 40 Rising Edge Interrupt Mask
91
94
0x006C
GPIO71_40_FMASK
PIO Pin Ports 71 to 40 Falling Edge Interrupt Mask
91
95
0x0070
GPIO71_40_DATA
PIO Pin Ports 71 to 40 Data
92
96
0x0074
GPIO71_40_DIR
PIO Pin Ports 71 to 40 Data Direction
92
97
0x0078
GPIO71_40_POL
PIO Pin Ports 71 to 40 Data Polarity
92
98
0x007C
GPIO71_40_SET
PIO Pin Ports 71 to 40 Set Data Bit
93
99
0x0080
GPIO71_40_RESET
PIO Pin Ports 71 to 40 Clear Data Bit
93
100
0x0084
GPIO71_40_TOG
PIO Ports 71 to 40 Toggle Data Bit
93
101
0x0088
GPIO72_INT
PIO Pin Port 72 Interrupt Status
93
102
0x008C
GPIO72_EDGE
PIO Pin Port 72 Edge Status
93
103
0x0090
GPIO72_RMASK
PIO Pin Port 72 Rising Edge Interrupt Mask
94
104
0x0094
GPIO72_FMASK
PIO Pin Port 72 Falling Edge Interrupt Mask
94
105
0x0098
GPIO72_DATA
PIO Pin Port 72 Data
95
106
0x009C
GPIO72_DIR
PIO Pin Port 72 Data Direction
95
107
0x00A0
GPIO72_POL
PIO Pin Port 72 Data Polarity
95
108
0x00A4
GPIO72_SET
PIO Pin Port 72 Set Data Bit
96