MEDIATEK Ralink MT7620 - Page 131

PGMT7620_V.1.0_040503
Page 131 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Case 3:
CFG_FSYNC Register: CFG_FSYNC_EN = 1, START_LOC=0x1A, interval=2
CH0_CFG Register: TS_START=1 (disable)
CH1_CFG Register: TS_START=0x1A
PCM_CFG Register: LONG_FSYNC=1’b0, FSYNC_POL=1’b0 (LOW active), DRX_TRI=1’b0, SLOT_MODE=3’b0,
RAW16-bits