MEDIATEK Ralink MT7620 - Page 182

PGMT7620_V.1.0_040503
Page 182 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
0
RW
RD_BYPASS_WR
Read Bypass Write Enable
Allows read commands to bypass write
commands for OCP_IF when the address does
not conflict.
0: Disable
1: Enable
0x1
221. OCP_CFG1: OCP Configuration1 (offset: 0x0014)
Bits
Type
Name
Description
Initial Value
31:0
RW
RD_BYPASS_WR_MASK
Mask for read bypass write address
0: No mask
1: Mask
0xFFFF_FFFF
222. R2P_MONITOR: Rbus to Pbus Monitor (offset: 0x0024)
Bits
Type
Name
Description
Initial Value
31:17
-
-
Reserved
-
16
W1C
R2P_INT_CLR
R2P Interrupt Clear
Write 1 to clear this interrupt.
0x0
15:10
RO
R2P_ERR_CNT
R2P error counter
-
9:0
RW
R2P_INT_CNT
R2P Interrupt Countdown Timer
Sets a delay timer which begins counting down
when an R2P error is detected. When the timer
reaches zero the R2P interrupt is then
triggered.
10’d0: DIsable R2P monitoring
10’d1: 20 μs
10’d2: 40 μs
10’d1023: 40 ms
0x1023
223. ERR_ADDR: Rbus to Pbus ERR Address (offset: 0x0028)
Bits
Type
Name
Description
Initial Value
31:0
RO
R2P_ERR_ADDR
R2P address record for previous error found
0x0