308
(d) Device data latch processing time
When the latch range is set, the processing time shown below is required.
*1
[Device data latch processing time]
(N1 × KM1) + ((N2/16 + N3) × KM2) [µs]
• N1: Number of device types specified to be latched
*2
• N2: Number of bit device points specified to be latched
*3
• N3: Number of word device points specified to be latched
*3
*1 The scan time does not increase even if the latch range is set for the file register (R, ZR), extended data register (D), or
extended link register (W).
*2 Count the latch range (1) and the latch range (2) as different device types.
*3 When setting the latch range of the timer (T), retentive timer (ST), and counter (C), one point for word device and two
points for bit device are occupied per point.
To shorten the scan time, minimize the number of latch points.
• Move data to be latched to the file register.
• Store device data that is less frequently updated in the standard ROM with the SP.DEVST instruction.
(
Page 165, Section 3.29)
(6) Service processing time
The following shows the service processing time required for each communication function when the number of
processing is set to one.
(7) Common processing time
The CPU module performs common processing by the system. The common processing time shown below is
required.
CPU module KM1 KM2
L02CPU 3.0 0.12
L26CPU-BT 3.0 0.05
CPU
module
Processing time
Program read (when
a 10K-step program
file is read)
Online change in the
ladder mode (when
adding 100 steps to
the start of an 8K-step
program)
Online change in the
ladder mode (when
adding 100 steps to
the start of a 20K-step
program)
Online change (file)
(when a 10K-step
program file is read)
Device data Monitor
(Data register: 32
points)
L02CPU 0.95 [ms] 1.20 [ms] ⎯ 4.40 [ms] 0.50 [ms]
L26CPU-BT 0.95 [ms] ⎯ 1.00 [ms] 3.70 [ms] 0.40 [ms]
CPU module Processing time
L02CPU 0.21 [ms]
L26CPU-BT 0.17 [ms]
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