Renesas M16C Series User Manual

Interrupts
M30240 Group
Rev.1.00 Sep 24, 2003 Page 30 of 360
1.2.12.1 Interrupt control registers
Peripheral I/O interrupts have their own interrupt control registers. Table 1.11 shows the addresses
of the interrupt control registers. Figure 1.16 shows the interrupt control registers.
The interrupt request bit is set by hardware to “0” when an interrupt request is received. The interrupt
request bit can also be set by software to “0”. (Do not set to “1”.)
INT
0 and INT1 are triggered by the edges of external inputs. The edge polarity is selected using the
polarity select bit. (Other interrupts are described elsewhere.)
An interrupt must first be enabled before it can be used to cancel stop mode.
Table 1.11: Addresses in interrupt control register
Interrupt control register
Symbol
name
Address
Interrupt control register
Symbol
name
Address
USB Suspend Interrupt SUSPIC
0044
16
UART1 receive S1RIC
0054
16
USB Resume interrupt RSMIC
0046
16
Timer A0 TA0IC
0055
16
USB Start Of Frame SOFIC
0047
16
Timer A1 TA1IC
0056
16
Bus collision detection BCNIC
004A
16
Timer A2 TA2IC
0057
16
DMA0 DM0IC
004B
16
Timer A3 TA3IC
0058
16
DMA1 DM1IC
004C
16
Timer A4 TA4IC
0059
16
Key input interrupt KUPIC
004D
16
Timer B0 TB0IC
005A
16
A-D ADIC
004E
16
Timer B1 TB1IC
005B
16
UART2 transmit S2TIC
004F
16
USB Reset RSTIC
005C
16
UART2 receive S2RIC
0050
16
INT0 INT0IC
005D
16
UART0 transmit S0TIC
0051
16
INT1 INT1IC
005E
16
UART0 receive S0RIC
0052
16
USB Function USBFIC
005F
16
UART1 transmit S1TIC
0053
16

Renesas M16C Series Specifications

General

Brand	Renesas
Model	M16C Series
Category	Computer Hardware
Language	English